1. Field of the Invention
The present invention relates to the field of semiconductor processing. More particularly, the present invention relates to a method of planarizing a substrate surface that is capable of improving amorphous-Si CMP loading and achieving high degree of planarity.
2. Description of the Prior Art
Planarization is increasingly important in semiconductor manufacturing techniques. As device sizes decrease, the importance of achieving high resolution features through photolithographic processes correspondingly increases thereby placing more severe constraints on the degree of planarity required of a semiconductor wafer processing surface.
However, variation in pattern density causes difference of CMP removal rate between dense region and semi-dense region, resulting in poor within-die (WID) loading. Therefore, there is a need in this industry to provide an improved method of planarizing a substrate surface that is capable of improving the WID loading.